1. Field of the Invention
The present invention relates generally to a semiconductor structure and a process thereof, and more specifically to a semiconductor structure and a process thereof that performs two in-situ annealing processes on a dielectric layer.
2. Description of the Prior Art
Poly-silicon is conventionally used as a gate electrode in semiconductor devices, such as the metal-oxide-semiconductors (MOS). With the trend towards scaling down the size of semiconductor devices, however, conventional poly-silicon gates face problems such as inferior performances due to boron penetration and unavoidable depletion effect. This increases the equivalent thickness of the gate dielectric layer, reduces the gate capacitance, and worsens a driving force of the devices. Therefore, work function metals are used to replace the conventional poly-silicon gate to be the control electrode, and to form metal gates.
Dielectric layers are needed in a polysilicon gate or a metal gate, and the dielectric layers are respectively located between polysilicon and a substrate, or between a metal and a substrate. In general, the dielectric layer of the polysilicon gate is an oxide layer, and the dielectric layer of the metal gate may include a buffer layer or a dielectric layer having a high dielectric constant etc. As semiconductor components shrink, the requirements for the size and the material properties of the dielectric layer become critical. Thus, it becomes an important issue to know how to form a dielectric layer that can approach the desired electric performances or how to improve a processing efficiency and reduce processing costs in the semiconductor industry.